Watchdog timer
The ADuC814 microprocessor is equipped a watchdog timer function (WDT).
WDT prevents program malfunctions which lead to deadlocking.
During normal program operation, the watchdog counter is regularly set to zero by the programme.
In a case of an uncontrollable program malfunction the resetting of the watchdog counter will not occur.
The circuit will then initiate a corrective action which will either secure continuing the program from a predefined safe state or reset the entire program.
The WDT is set to initiate a program reset for the regulation programs considered here.
This means that the regulation algorithm will start and respond in the same way as after the first launch of the regulation programme.
The setting of the watchdog timer intervals WDTO depends on the sampling period of the regulation program.
The set up values of WDTO for the particular ranges of the sampling period Δt are listed in the table below.
Table 1
| Interval ∆t [s] |
WDTO [ms] |
| MIN ∆t [s] |
MAX ∆t [s] |
| 8/128 |
64 |
15.6 |
| 64 |
128 |
31.2 |
| 128 |
256 |
62.5 |
| 256 |
512 |
125 |
| 512 |
1024 |
250 |
| 1024 |
2048 |
500 |
| 2048 |
4096 |
1000 |