Setting up – Basic wiring diagram

Essential components for the correct function of the circuit and how to connect them

1.Power supply. To ensure power supply there is necessary to use two separate stabilized power supply voltage 5 V; separate analog power supply voltage AV_DD and digital power supply voltage DV_DD with analog and digital ground AGND and DGND, respectively. It is necessary to ground these in one common node, see Fig. 1. The voltage supply can be secured either through an accumulator with appropriate voltage or for instance through a 9 V DC network supply and subsequent follow-voltage stabilization.

Fig.1

2.Connect crystal XT 32.782 MHz between pin terminals XTAL1 and XTAL2 (Pins 26 and 27, respectively) of the ADuC814 package. Connect an 18 pF capacitor between terminal 26 and GND, and terminal 27 and GND.

3.Add blocking capacitors on the analog feedline (pin 13) and on the digital feedline (pin 28). Then, connect two blocking capacitors to pin V_ref (pin 16) and pin C_ref (pin 17). All capacitors have the value of 0.1 µF and are connected to AGND, only the capacitor on pin 7 (DV_DD) is connected to DGND.

4.The ADuC814 circuit is equipped with an internal POR (power-on-reset), which on a DV_DD voltage drop below 2.54 V holds the ADuC814 in the RESET state. The internal counter/timer will release the RESET input 128 ms after the DV_DD voltage rises above 2.54 V. It is important that the user makes sure that the power supply voltage remains constant and stable above the level of 2.7 V. Likewise, on power-down, the internal POR holds the ADuC814 in RESET until the power supply drops below 1 V. If it is required to equip the circuit with a manual reset button, it is possible to do so for example according to the connection in Fig. 2.

Fig. 2

5.It is appropriate to equip the analog signal inputs ADC0 (pin 11) and ADC1 (pin 12) with damage protection. This can be done by employing a voltage follower paired with Schottky diodes (e.g. 1N5819 or BAT41) to limit the overvoltage of the analog input signal and to prevent polarity reversal. The Schottky diodes may be necessary to limit the voltage applied to the analog input pin as per the Absolute Maximum Ratings. It is not necessary to connect the Schottky diodes, if the operational amplifier (op amp) used is powered from the same power supply as ADuC814. See Fig. 3.

Fig. 3

6.The op amp gain in Fig. 3 is set to 1. By the choice of appropriate connected resistors, however, it is possible to set a different required gain in order to fully utilise the range of the 12 - bit AD convertor in the range of 0 to 2.5 V. For instance, it is possible to use OP191/OP291/OP491 type op gain which is useful for buffering the DAC inputs as well as the outputs in the range up to V_DD. This type is also inexpensive.

The range of analog voltage for ADC is 0 V to U_ref = 2.5 V, the output coding of the digital value is binary.

1 LSB = FS/4096 i.e. 2.5/4096 = 0.61 mV for U_ref = 2.5 V

For the ADC guaranteed conversion accuracy it is necessary that the total impedance of the signal source at the ADC input is less than 61 Ω for each input. The analog signal output DAC0 (pin 20) is given in the range of 0 V to Uref = 2.5 V. In 0 V-to-V_REF mode, the DAC output transfer function spans from 0 V to the internal VREF (it is set in the software for our application) depending on the digital 12-bit value sent to the DAC input. The converter is 12-bit. The DAC’s linearity specification is guaranteed throughout the full transfer function except for codes 0 to 48, and 3945 to 4095 but only in the range of 0 V to AV_DD (which we do not use in our application). With ADuC814 is supposed resistive load to grounds R = 10 k Ω at the DAC output. As the output is forced to source or sink more current, the nonlinear regions become larger.

To increase the source and sink current capability of the DACs it is convenient to add an external buffer, as shown in Fig. 4.

It is possible to use the same type of op amp as for the treatment of the analog inputs. Thus, for instance, the OP491 op amp the package of which contains four op amps.

Fig. 4